A driver circuit is typically used to drive an electrical signal onto a conductive path, such as a circuit board trace, which is connected to a receiver circuit. The signal requires a return path from the receiver back to the driver. More specifically, to generate a positive voltage signal in a theoretical sense, the driver generates the signal by removing positive charge from a signal-reference plane, such as a VCC plane, and driving the positive charge onto the conductive path to the receiver. Once the charge reaches the receiver, it returns to the signal-reference plane via a return-signal path having the least impedance (if there are multiple return paths to choose from). The signal path or loop followed by the signal from driver to receiver, and from receiver back to driver, is referred to herein as a transmission path. The longer the return-signal path, the higher are its impedance and impedance discontinuities, and the more likely the signal is to generate cross talk or electromagnetic interference (EMI). Unfortunately, when the driver and receiver are mounted on separate circuit boards and connected by a connector, or are separated by one or more intervening circuit boards, the return-signal path may be relatively long and have numerous impedance discontinuities.
Therefore, for maximum signal integrity and low EMI, it is important to minimize the length, loop area, and inductance of a return-signal path. Where the return path is not confined to a single circuit board, it may follow a discontinuous path across signal-reference planes of the several circuit boards. Because the signal reference planes of the separate circuit boards may not be connected together, the return-signal must “jump” between the reference planes via bypass capacitors and the ground planes of the circuit boards. That is, bypass capacitors provide a way for the return signal to jump between the reference planes of separate circuit boards by allowing the return signal to move to and from the ground planes for conduction through the circuit board connectors. Ideally, bypass capacitors would be located physically close enough to a return-signal pin of the circuit board connector to provide a short, low impedance return-signal path. However, because of manufacturing and circuit-board-space limitations, bypass capacitors seldom can be placed close enough to a return-signal pin.
FIG. 1 is a block diagram illustrating a driver 10 located on a circuit board 1, a receiver 20 located on a circuit board 2, and coupled together through a circuit board 3 by connectors CN1 and CN2. FIG. 2 is a block diagram illustrating the voltage-reference-plane stack-up of the components of FIG. 1. Circuit board 1 includes a signal-reference plane 12 at voltage V1, signal conductor IS, a ground plane (GND), and a bypass capacitor C1. Circuit board 2 includes a reference plane 22 at voltage V4, a signal conductor IS, a ground plane (GND), and a bypass capacitor C4. Circuit board 3 includes a reference plane 32 at voltage V2, a reference plane 34 at voltage V3, a signal conductor IS, bypass capacitors C2 and C3, and a ground plane (omitted for clarity). For the purposes of this background, it will be assumed that voltages V1, V2, V3, and V4 are all different and thus the reference planes are not connected to one another.
Here, a “plane” is a conductor that covers virtually the entire area of one layer of the circuit board, and “trace” is a conductor that is much thinner than a plane, and thus covers only a small area of one layer of the circuit board. Thus, a circuit board layer may include many traces and no plane, or include only one or more planes but no traces. In addition, the circuit boards may include a plurality of return-signal paths for different return signals.
Typically, a high-speed digital signal output by the driver 10 will switch between two voltages, here V1 on the power plane 12 and ground (GND). The high-speed electrical digital signal is received by receiver 20 and typically switches between the same two voltages, here V4 on the power plane 22 and ground GND, where V1=V4. A problem arises when the reference (power) planes for the driver 10 and the receiver 20 are physically different. This can occur when the driver 10 and the receiver 20 are on the same circuit board but reference different power planes. The problem can also occur when the driver 10 and the receiver 20 are on different circuit boards, or when one of the power planes on an intermediate circuit board between the circuit board carrying the driver 10 and the circuit board carrying the receiver 20, such circuit board 2, provides a reference plane for the high-speed signal.
The high-speed electrical signal would like to flow in a path having a minimum impedance from the power plane 12 through the driver 10, through a signal conductor to the receiver 20, then find a return path back to the power plane 12. In the assembly illustrated in FIGS. 1 and 2, the forward path includes the signal conductors IS of circuit boards 1, 2, and 3, which are interconnected by connectors CN1 and CN2. Connectors CN1 and CN2 may be any type of coupling device to connect the conductors of one circuit board to another circuit board, and may include a flex cable.
To complete the electrical circuit, a return-signal current path is required from the receiver 20 to the plane 12. The return signal will typically follow a path having the lowest relative impedance. For example, the return signal may flow to the power plane 22 (V4) on circuit board 2. To flow from board 2 to board 3, it will follow a path from power plane 22 (V4) through the bypass capacitor C4 on the circuit board 2 to the ground (GND) plane on the board 2. The return signal then flows on the ground (GND) plane of board 2 to and through the ground contacts of connector CN2 to the ground plane (not shown) of circuit board 3. The return signal then flows along the ground plane to either, or both, bypass capacitors C2 and C3, where it will flow to the power planes V2 and/or V3. The return signal will continue on these power planes, and then, as the return signal approaches connector CN1, it must flow back to the ground plane (GND) of circuit board 3 through other bypass capacitors (not shown). The return signal will then be carried on the ground contacts (not shown) of connector CN1 to the ground plane (GND) of circuit board 1, where it will travel on the ground plane until it reaches capacitor C1, and then flow to power plane 12 (V1) completing the return. This return path may distort the signal because of the increased signal path length, impedance, and the loop area of the path.